Average Reviews:
(More customer reviews)ASIC/FPGA verification has always been a mixture of various proprietary software and methodologies. However, with SystemVerilog, PSL, and OVM, verification is moving toward open source standard methodology. Today, ASIC/FPGA verification is where RTL design was in the early 90's.
Are you an FPGA/ASIC engineer who has heard about assertions, SystemVerilog , and OVM? Are you looking for an easy, step-by-step book that will help your company and you move from direct test verification or lab verification to the modern advanced functional verification (AFV)?
So. the big question from companies and engineers is, "What book can I buy to get me started with advanced functional verification?"
This is the first book I have read that understands that companies and employees cannot just throw out their current verification methodology on Monday and start using advanced functional verification on Tuesday. This book begins by using ModelSim and code coverage, and each chapter progressively adds more AFV techniques. The book is written so that the user can determine how much AFV is appropriate for him/her and allows each user to remain at any step toward full AFV. For example, I liked the chapter that explained how I can start using assertion-based verification without upgrading the simulation software.
Unlike so many other SV/OVM books I have read, this book assumes the user wants basic knowledge of AFV and is a guide to understanding an AFV system. The other books assume one already knows the information provided in this book.
It is also very easy to read. I liked the fact that the chapters are short enough that one can easily read and finish a chapter while waiting for someone, on short bus trips, or in an airplane. The examples in the book are easy to understand and completely explained line-by-line, which I loved. The examples can also be downloaded.
I highly recommend this book to anyone who wants to start using AFV. If you are an engineer who does not want to be left behind, get this book.
Click Here to see more reviews about: FPGA Simulation: A Complete Step-by-Step Guide
FPGA Simulation: A Complete Step-by-Step Guide shows FPGA design engineers how to avoid long lab debug sessions by simulating with SystemVerilog.The book helps engineers to have never simulated their designs before by bringing them through seven steps that can be added incrementally to a design flow.Engineers start with code coverage as the first step.Succeeding steps introduce test planning, assertions, and SystemVerilog simuation techniques.By the end of the process engineers who have never simulated before will know how to create complete self-checking test benches that generate their own stimulus, and demonstrate complete functional coverage.This book is a must for engineers who are facing DO-254 certification requirements on their next FPGA project.
Buy cheap FPGA Simulation: A Complete Step-by-Step Guide now.
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